Senior Principal Engineer – DFT ATPG Lead Updated On Mon, Aug 19th, 2024 by Saurenergy Responsibilities:- Leading DFT ATPG implementation, integration and verification of System-on-Chip (SoC) from initial specification till tapeout and production. Ensure Test Coverage Goals are met at SoC Level. Addressing test quality targets in DFT architecture and test pattern generation. Leading various aspects of Test architecture including Scan&ATPG, and post-silicon support Work with different functions like front-end […] Read more